CSREAESA 2004 - PDF Preprint Papers

CSREAESA 2004

Teaser Browsing | Click Here

Title Browsing | Click Here

Wall of Fame | Most Viewed CSREAESA-2004 Paper

click to vote

CSREAESA
2004

193views Embedded Systems» more CSREAESA 2004»

Driving Fully-Adiabatic Logic Circuits Using Custom High-Q MEMS Resonators

14 years 1 months ago

Download plaza.ufl.edu

To perform digital logic in CMOS in a truly adiabatic (asymptotically thermodynamically reversible) fashion requires that logic transitions be driven by a quasitrapezoidal (flat-t...

Venkiteswaran Anantharam, Maojiao He, Krishna Nata...

claim paper

Read More »

Disclaimer and Copyright Notice

Sciweavers respects the rights of all copyright holders and in this regard, authors are only allowed to share a link to their preprint paper on their own website. Every contribution is associated with a desciptive image. It is the sole responsibility of the authors to ensure that their posted image is not copyright infringing. This service is compliant with IEEE copyright.

Id	Views	Title	Status

1	193	Driving Fully-Adiabatic Logic Circuits Using Custom High-Q MEMS Resonators	claim
2	158	CMOS Implementation of Phase-Encoded Complex-Valued Artificial Neural Networks	claim
3	146	Survey and Evaluation of Low-Power Full-Adder Cells	claim
4	136	Intelligent Resource Agents for Embedded Systems	claim
5	131	Identifying and Evaluating a Generic Set of Superinstructions for Embedded Java Programs	claim
6	130	A Low-Power Pipelined Implementation of 2D Discrete Wavelet Transform	claim
7	127	An Energy-Aware Synthesis Methodology for OS-Driven Multi-Process Embedded Software	claim
8	120	A High Performance, Low Area Overhead Carry Lookahead Adder	claim
9	116	Switching Activity Minimization in Combinational Logic Design	claim
10	112	Language Selection for Mobile Systems: Java, C, or Both?	claim
11	106	Analytical Analysis of Data and Decision Fusion in Sensor Networks	claim
12	100	Automatic Extraction of Non-Iterated System Behavior from Verilog Specifications	claim
13	99	Approaches for Monitoring Vectors on Microprocessor Buses	claim
14	97	Designing NULL Convention Combinational Circuits to Fully Utilize Gate-Level Pipelining for Maximum Throughput	claim
15	95	Experimental Analysis of Batteries Under Continuous and Intermittent Operations	claim
16	91	Link-Time Compaction of MIPS Programs	claim
17	91	Design of a NULL Convention Self-Timed Divider	claim
18	79	A Distributed FIFO Scheme for System on Chip Inter-Component Communication	claim
19	78	Flexible Internet Based Diagnostics of Embedded Systems	claim

Sciweavers

Explore & Download

Productivity Tools

Document Tools

Image Tools

Sciweavers