New Non-Volatile Memory Structures for FPGA Architectures

A new set of programmable elements (PEs) using a new non-volatile device for use with routing switches and logical elements within a field-programmable gate array (FPGA) is described. The PEs have small area, can be combined with components that use low operational voltage on the same CMOS logic process, are non-volatile, enable the use of fast thin-oxide pass transistors, and are reprogrammable. A novel non-volatile flip-flop for use within the logical elements is presented as well. In combination, these methods enable programmable logic devices with improved area efficiency, the speed advantages of SRAM-based FPGAs, and a wide range of opportunities for power down strategies.

• Type: Journal
• Year: 2008
• Where: TVLSI
• Authors: David Choi, Kyu Choi, John D. Villasenor
• Keywords: Field-programmable Gate Array, Logical Elements, Non-volatile, TVLSI 2008