Low-Complexity Policies for Energy-Performance Tradeoff in Chip-Multi-Processors

Chip-Multi-Processors (CMP) utilize multiple energy-efficient Processing Elements (PEs) to deliver high performance while maintaining an efficient ratio of performance to energy-consumption . In order to utilize CMP resources, the software application is split into multiple tasks that are executed in parallel on the PEs. Dynamic frequency-Voltage Scaling (DVS) balances performance and energy consumption by dynamically varying a PE's frequency-voltage workpoint in order to save energy while meeting performance requirements. This work addresses DVS policies for CMP. We consider multi-task CMP applications with unknown workloads. We dynamically set frequency-voltage workpoints for each PE in the CMP, attempting to minimize a defined energy-performance criterion.. Other DVS methods typically use high complexity optimization techniques, which limits the possibility of real-time implementation in performance-driven, energy-aware systems. In contrast, we investigate simple heuristic DVS...

• Type: Journal
• Year: 2008
• Where: TVLSI
• Authors: A. Elyada, Ran Ginosar, Uri Weiser
• Keywords: DVS Policies, Frequency-voltage Workpoints, Performance, TVLSI 2008