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IEICET
2010

An Asynchronous FPGA Based on LEDR/4-Phase-Dual-Rail Hybrid Architecture

13 years 10 months ago
An Asynchronous FPGA Based on LEDR/4-Phase-Dual-Rail Hybrid Architecture
Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama
Added 26 Jan 2011
Updated 26 Jan 2011
Type Journal
Year 2010
Where IEICET
Authors Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama, Michitaka Kameyama
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