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    IEICET
    2010
    86views more  IEICET 2010»
    An Asynchronous FPGA Based on LEDR/4-Phase-Dual-Rail Hybrid Architecture
    13 years 5 months ago
    An Asynchronous FPGA Based on LEDR/4-Phase-Dual-Rail Hybrid Architecture
    Download  www.kameyama.ecei.tohoku.ac.jp
    Shota Ishihara, Yoshiya Komatsu, Masanori Hariyama...
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    ASPDAC
    2011
    ACM
    215views Hardware» more  ASPDAC 2011»
    An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture
    12 years 11 months ago
    An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture
    Download  www.kameyama.ecei.tohoku.ac.jp
    —This paper presents an asynchronous FPGA that combines four-phase dual-rail encoding and LEDR (Level-Encoded Dual-Rail) encoding. Four-phase dual-rail encoding is used for small...
    Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama...
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