A general probabilistic framework for worst case timing analysis

CT The traditional approach to worst-case static-timing analysis is becoming unacceptably conservative due to an ever-increasing number of circuit and process effects. We propose a fundamentally different framework that aims to significantly improve the accuracy of timing predictions through fully probabilistic analysis of gate and path delays. We describe a bottom-up approach for the construction of joint probability density function of path delays, and present novel analytical and algorithmic methods for finding the full distribution of the maximum of a random path delay space with arbitrary path correlations. Categories and Subject Descriptors J.6.1 [Computer-Aided Engineering]: Computer-aided design. General Terms Algorithms

• Type: Conference
• Year: 2002
• Where: DAC
• Authors: Michael Orshansky, Kurt Keutzer
• Keywords: Arbitrary Path Correlations, DAC 2002, Design Automation, Path Delays, Random Path Delay