The next chip challenge: effective methods for viable mixed technology SoCs

The next generation of computer chips will continue the trend for more complexity than their predecessors. Many of them will contain different chip technologies and are termed SoCs (System on a Chip). They present to the process community, the system and circuit communities, as well as to the design and test communities major new challenges. On the other hand they also offer at the same time also new opportunities!. For one, the desire to bring more functionality onto a single chip tends to require additional processing, which in turn results in various degrees of device compromises. The chips will also tend to become larger due to the added device content, and this generally will impact the yieldability of the final chip. And such chips will require potentially new approaches to validate the intended design performances. Chip sector reuse must also be brought into the discussion and wherever possible into practice. The net effect implies higher chip costs. Much of the industry's...

• Type: Conference
• Year: 2002
• Where: DAC
• Authors: H. Bernhard Pogge
• Keywords: Chip Packaging Process, Chip Sector Reuse, DAC 2002, Design Automation, Traditional Chip Area