Transformation based communication and clock domain refinement for system design

The ForSyDe methodology has been developed for system level design. In this paper we present formal transformation methods for the refinement of an abstract and formal system model into an implementation model. The methodology defines two classes of design transformations: (1) semantic-preserving transformations and (2) design decisions. In particular we present and illustrate communication and clock domain refinement by way of a digital equalizer system. Categories and Subject Descriptors B.7.2 [Integrated Circuits]: Design-Aids; J.6 [Computer-Aided Engineering]: Computer-Aided Design (CAD) General Terms Design, Theory Keywords System Design, System Modeling, Design Refinement

• Type: Conference
• Year: 2002
• Where: DAC
• Authors: Ingo Sander, Axel Jantsch
• Keywords: Clock Domain Refinement, DAC 2002, Design Automation, Design Refinement, Keywords System Design