A Compact Transactional Memory Multiprocessor System on FPGA

In this paper we present a rapid prototyping platform on a single Field Programmable Gate Array (FPGA) with support for software transactional memory. The system is composed only by off-the-shelf cores and is useful for porting and early validation of programs to the transactional memory programming memory. We discuss the implementation of the software layer of this platform, propose an analysis of the system and compare it to a hardware lock based multiprocessor architecture, showing the trade-offs in terms of performance and programming complexity.

• Type: Journal
• Year: 2010
• Where: FPL
• Authors: Matteo Pusceddu, Simone Ceccolini, Gianluca Palermo, Donatella Sciuto, Antonino Tumeo
• Keywords: Field Programmable Gate Array, FPL 2010, Hardware, Software Transactional Memory, Transactional Memory