Energy reduction for STT-RAM using early write termination

The emerging Spin Torque Transfer memory (STT-RAM) is a promising candidate for future on-chip caches due to STT-RAM's high density, low leakage, long endurance and high access speed. However, one of the major challenges of STT-RAM is its high write current, which is disadvantageous when used as an on-chip cache since the dynamic power generated is too high. In this paper, we propose Early Write Termination (EWT), a novel technique to significantly reduce write energy with no performance penalty. EWT can be implemented with low complexity and low energy overhead. Our evaluation shows that up to 80% of write energy reduction can be achieved through EWT, resulting 33% less total energy consumption, and 34% reduction in ED2 . These results indicate that EWT is an effective and practical scheme to improve the energy efficiency of a STT-RAM cache.

• Type: Journal
• Year: 2009
• Where: ICCAD
• Authors: Ping Zhou, Bo Zhao, Jun Yang 0002, Youtao Zhang
• Keywords: Future On-chip Caches, Hardware, ICCAD 2009, On-chip Cache, Spin Torque Transfer