Decoding-Aware Compression of FPGA Bitstreams

Abstract—Bitstream compression is important in reconfigurable system design since it reduces the bitstream size and the memory requirement. It also improves the communication bandwidth and thereby decreases the reconfiguration time. Existing research in this field has explored two directions: efficient compression with slow decompression, or fast decompression at the cost of compression efficiency. This article proposes a novel decode-aware compression technique to improve both compression and decompression efficiencies. The three major contributions of this article are i) smart placement of compressed bitstreams that can significantly decrease the overhead of decompression engine, ii) selection of profitable parameters for bitstream compression, and iii) efficient combination of bitmaskbased compression and run length encoding of repetitive patterns. Our proposed technique outperforms the existing compression approaches by 15%, while our decompression hardware for variable-...

• Type: Journal
• Year: 2011
• Where: TVLSI
• Authors: Xiaoke Qin, Chetan Muthry, Prabhat Mishra
• Keywords: Abstract—Bitstream Compression, Compression Efficiency, Efficient Compression, TVLSI 2011