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TVLSI
2011
216views more  TVLSI 2011»
13 years 7 months ago
Energy and Performance Models for Synchronous and Asynchronous Communication
—Communication costs, which have the potential to throttle design performance as scaling continues, are mathematically modeled and compared for various pipeline methodologies. Fi...
Kenneth S. Stevens, Pankaj Golani, Peter A. Beerel
TVLSI
2011
343views more  TVLSI 2011»
13 years 7 months ago
A Digitally-Calibrated Phase-Locked Loop With Supply Sensitivity Suppression
—A digitally-calibrated technique to suppress the supply voltage sensitivity of a phase-locked loop (PLL) is presented. The voltage-controlled ring oscillator with an additional ...
Shih-Yuan Kao, Shen-Iuan Liu
TVLSI
2011
265views more  TVLSI 2011»
13 years 7 months ago
Decoding-Aware Compression of FPGA Bitstreams
Abstract—Bitstream compression is important in reconfigurable system design since it reduces the bitstream size and the memory requirement. It also improves the communication ba...
Xiaoke Qin, Chetan Muthry, Prabhat Mishra