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2007
IEEE

MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip

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MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and lower energy consumption. The memory architecture of the embedded system strongly influences these parameters. Hence the embedded system designer performs a complete memory architecture exploration. This problem is a multi-objective optimization problem and can be tackled as a two-level optimization problem. The outer level explores various memory architecture while the inner level explores placement of data sections (data layout problem) to minimize memory stalls. Further, the designer would be interested in multiple optimal design points to address various market segments. However, tight time-to-market constraints enforces short design cycle time. In this paper we address the multi-level multi-objective memory architecture exploration problem through a combination of Multi-objective Genetic Algorithm (Memory...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj
Added 30 Nov 2009
Updated 30 Nov 2009
Type Conference
Year 2007
Where VLSID
Authors T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindarajan
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