16-Bit Segmented Type Current Steering DAC for Video Applications

In this paper, 16-bit, 50 MHz Current Steering DAC is designed. This DAC is implemented using TSMC 0.35 ?m technology. An optimum segmentation is done of 16-bits into binary and thermometric bits. The integral nonlinearity (INL) and differential non-linearity (DNL) is less than 0.3 LSB and 0.1 LSB respectively. It occupies only 0.06 mm2 area. The average total power consumption is 165 mW. A novel technique has been applied to reduce the glitch energy. The design is implemented with the matching requirements, required for current sources.

• Type: Conference
• Year: 2006
• Where: VLSID
• Authors: Gaurav Raja, Basabi Bhaumik
• Keywords: Computer Architecture, Current Steering DAC, Thermometric Bits, Total Power Consumption, VLSID 2006