This paper presents the Smith and Waterman Algorithm-Specific ASIC Design (SWASAD) project. This is a hardware solution that implements the S&W algorithm.. The SWASAD is an improved implementation of the Biological Information Signal Processor (BISP) design [1], The SWASAD chip fabricated on a 0.5 ?m process achieves 3200 million Matrix Cells Per Second (MCPS) per chip, with a layout size of 7.1 mm by 7.1 mm. This is a large improvement over existing designs and improves data throughput by using a smaller datawidth.