Switching Noise Analysis Framework For High Speed Logic Families

14 years 12 months ago

Marco Delaurenti, Mariagrazia Graziano, Guido Mase

Computer Architecture | Speed Logic Families | VLSID 2001 |

claim paper

Added	01 Dec 2009
Updated	01 Dec 2009
Type	Conference
Year	2001
Where	VLSID
Authors	Marco Delaurenti, Mariagrazia Graziano, Guido Masera, Gianluca Piccinini, Maurizio Zamboni

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