Sciweavers

ICCD
2008
IEEE

Energy-aware opcode design

14 years 8 months ago
Energy-aware opcode design
— Embedded processors are required to achieve high performance while running on batteries. Thus, they must exploit all the possible means available to reduce energy consumption while not sacrificing performance. In this work, one technique to reduce energy is explored to intelligently design the instruction-opcodes of a processor based on a targetworkload. The optimization is done using a heuristic that notonly minimizes switching between adjacent instructions, but also simplifies the decoding to reduce latches to save dynamic energy. On average, an optimized opcode is able to be decoded using 40-60% less latches in the decoder. In addition, it is shown that a decoder optimized for algorithms that had similar program structure, similar data-types or similar behavior exhibited consistent patterns of energy reduction. The techniques presented in this paper yield an average 10% reduction in the total dynamic energy. It is also shown that this heuristic can be used to achieve similar res...
Balaji V. Iyer, Jason A. Poovey, Thomas M. Conte
Added 15 Mar 2010
Updated 15 Mar 2010
Type Conference
Year 2008
Where ICCD
Authors Balaji V. Iyer, Jason A. Poovey, Thomas M. Conte
Comments (0)