On Reducing Register Pressure and Energy in Multiple-Banked Register Files

The storage for speculative values in superscalar processors is one of the main sources of complexity and power dissipation. In this paper, we present a novel technique to reduce register requirements as well as their dynamic and static power dissipation that is based on delaying the dispatch of instructions while minimizing its impact on performance. The proposed technique outperforms previous schemes in both performance and power savings.

• Type: Conference
• Year: 2003
• Where: ICCD
• Authors: Jaume Abella, Antonio González
• Keywords: Hardware, ICCD 2003, Power Savings, Static Power Dissipation, Superscalar Processors