CUFFS: An instruction count based architectural framework for security of MPSoCs

—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to cause software attacks, which are the most common type of attacks on embedded systems. Therefore, we propose an MPSoC architectural framework, CUFFS, for an Application Specific Instruction set Processor (ASIP) design that has a dedicated security processor called iGuard for detecting software attacks. The CUFFS framework instruments the source code in the application processors at the basic block (BB) level with special instructions that allow communication with iGuard at runtime. The framework also analyzes the code in each application processor at compile time to determine the program control flow graph and the number of instructions in each basic block, which are then stored in the hardware tables of iGuard. The iGuard uses its hardware tables to verify the applications’ execution at runtime. For the fir...

• Type: Conference
• Year: 2009
• Where: DATE
• Authors: Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
• Keywords: Application Processor, Basic Block, DATE 2009, Hardware, Software Attacks