Statistical Fault Injection

A method for Statistical Fault Injection (SFI) into arbitrary latches within a full system hardware-emulated model is validated against particle-beam-accelerated SER testing for a modern microprocessor. As performed on the IBM POWER6 microprocessor, SFI is capable of distinguishing between error handling states associated with the injected bit flip. Methodologies to perform random and targeted fault injection are presented. Keywords – Fault Injection, Soft Errors, SER, SFI

• Type: Conference
• Year: 2008
• Where: DSN
• Authors: Pradeep Ramachandran, Prabhakar Kudva, Jeffrey W. Kellington, John Schumann, Pia Sanda
• Keywords: Computer Networks, DSN 2008, Fault Injection, IBM POWER6 Microprocessor, Statistical Fault Injection