Power-Aware and Branch-Aware Word-Length Optimization

Power reduction is becoming more important as circuit size increases. This paper presents a tool called PowerCutter which employs accuracy-guaranteed word-length optimization to reduce power consumption of circuits. We adapt circuit word-lengths at run time to decrease power consumption, with optimizations based on branch statistics. Our tool uses a technique based on Automatic Differentiation to analyze library cores specified as black box functions, which do not include implementation information. We use this technique to analyze benchmarks containing library functions such as square root. Our approach shows that power savings of up to 32% can be achieved on benchmarks which cannot be analyzed by previous approaches, because library cores with an unknown implementation are used.

• Type: Conference
• Year: 2008
• Where: FCCM
• Authors: William G. Osborne, José Gabriel F. Coutinho, Wayne Luk, Oskar Mencer
• Keywords: Circuit Size Increases, FCCM 2008, Hardware, Library Cores, Power Consumption