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ARITH
2007
IEEE

Serial Parallel Multiplier Design in Quantum-dot Cellular Automata

14 years 7 months ago
Serial Parallel Multiplier Design in Quantum-dot Cellular Automata
An emerging nanotechnology, quantum-dot cellular automata (QCA), has the potential for attractive features such as faster speed, smaller size, and lower power consumption than transistor based technology. Quantum-dot cellular automata has a simple cell as the basic element. The cell is used as a building block to construct gates, wires, and memories. Several adder designs have been proposed, but multiplier design in QCA is a rather unexplored research area. This paper utilizes the QCA characteristics to design serial parallel multipliers. Two types of serial parallel multipliers are designed and simulated with several different operand sizes. Those designs are compared in terms of complexity, area, and latency. The serial parallel multipliers have simple and regular structures.
Heumpil Cho, Earl E. Swartzlander Jr.
Added 02 Jun 2010
Updated 02 Jun 2010
Type Conference
Year 2007
Where ARITH
Authors Heumpil Cho, Earl E. Swartzlander Jr.
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