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DATE
2007
IEEE

Heterogeneous systems on chip and systems in package

14 years 6 months ago
Heterogeneous systems on chip and systems in package
This paper discusses several forms of heterogeneity in systems on chip and systems in package. A means to distinguish the various forms of heterogeneity is given, with an estimation of the maturity of design and modeling techniques with respect to various physical domains. Industry-level MEMS integration, and more prospective microfluidic biochip systems are considered at both technological and EDA levels. Finally, specific flows for bstraction heterogeneity in RF SiP and for functional co-verification are discussed.
I. O'Connor, B. Courtois, K. Chakrabarty, N. Delor
Added 02 Jun 2010
Updated 02 Jun 2010
Type Conference
Year 2007
Where DATE
Authors I. O'Connor, B. Courtois, K. Chakrabarty, N. Delorme, M. Hampton, J. Hartung
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