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DSD
2007
IEEE

General Digit-Serial Normal Basis Multiplier with Distributed Overlap

14 years 6 months ago
General Digit-Serial Normal Basis Multiplier with Distributed Overlap
We present the architecture of digit-serial normal basis multiplier over GF(2m ). The multiplier was derived from the multiplier of Agnew et al. Proposed multiplier is scalable by the digit width of general value in difference of the multiplier of Agnew et al. that may be scaled only by digit width that divides the degree m. This helps designers to trade area for speed e.g. in public-key cryptographic systems based on elliptic-curves, where m should be a prime number. Functionality of multiplier has been tested by simulation and implemented in Xilinx Virtex 4 FPGA.
Martin Novotný, Jan Schmidt
Added 02 Jun 2010
Updated 02 Jun 2010
Type Conference
Year 2007
Where DSD
Authors Martin Novotný, Jan Schmidt
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