A Many-core Implementation based on the Reconfigurable Mesh Model

The reconfigurable mesh is a model for massively parallel computing for which many algorithms with very low complexity have been developed. These algorithms execute cycles of bus configuration, communication, and constant-time computation on all processing elements in a lock-step. In this paper, we investigate the use of reconfigurable meshes as coprocessors to accelerate important algorithmic kernels. We discuss the development of a reconfigurable mesh on FPGA technology, including the host integration and the programming tool flow. Then, we present implementation results and a proof-of-concept case study.

• Type: Conference
• Year: 2007
• Where: FPL
• Authors: Heiner Giefers, Marco Platzner
• Keywords: Algorithms Execute Cycles, FPL 2007, Hardware, Massively Parallel Computing, Reconfigurable Mesh