Sciweavers

DAC
2005
ACM
16 years 7 months ago
Robust gate sizing by geometric programming
We present an efficient optimization scheme for gate sizing in the presence of process variations. Using a posynomial delay model, the delay constraints are modified to incorporat...
Jaskirat Singh, Vidyasagar Nookala, Zhi-Quan Luo, ...
DAC
2005
ACM
16 years 7 months ago
Incremental retiming for FPGA physical synthesis
In this paper, we present a new linear-time retiming algorithm that produces near-optimal results. Our implementation is specifically targeted at Altera's Stratix [1] FPGAbas...
Deshanand P. Singh, Valavan Manohararajah, Stephen...
DAC
2005
ACM
16 years 7 months ago
FLEXBUS: a high-performance system-on-chip communication architecture with a dynamically configurable topology
In this paper, we describe FLEXBUS, a flexible, high-performance onchip communication architecture featuring a dynamically configurable topology. FLEXBUS is designed to detect run...
Krishna Sekar, Kanishka Lahiri, Anand Raghunathan,...
DAC
2005
ACM
16 years 7 months ago
Multi-threaded reachability
Partitioned BDD-based algorithms have been proposed in the literature to solve the memory explosion problem in BDD-based verification. Such algorithms can be at times ineffective ...
Debashis Sahoo, Jawahar Jain, Subramanian K. Iyer,...
DAC
2005
ACM
16 years 7 months ago
Towards scalable flow and context sensitive pointer analysis
Pointer analysis, a classic problem in software program analysis, has emerged as an important problem to solve in design automation, at a time when complex designs, specified in t...
Jianwen Zhu
DAC
2005
ACM
16 years 7 months ago
Energy optimal speed control of devices with discrete speed sets
We obtain analytically, the energy optimal speed profile of a generic multi-speed device with a discrete set of speeds, to execute a given task within a given time. Current implem...
Ravishankar Rao, Sarma B. K. Vrudhula
143
Voted
DAC
2005
ACM
16 years 7 months ago
Diffusion-based placement migration
Placement migration is the movement of cells within an existing placement to address a variety of post-placement design closure issues, such as timing, routing congestion, signal ...
Haoxing Ren, David Zhigang Pan, Charles J. Alpert,...
DAC
2005
ACM
16 years 7 months ago
Floorplan-aware automated synthesis of bus-based communication architectures
Sudeep Pasricha, Nikil D. Dutt, Elaheh Bozorgzadeh...
DAC
2005
ACM
16 years 7 months ago
Structural search for RTL with predicate learning
We present an efficient search strategy for satisfiability checking on circuits represented at the register-transfer-level (RTL). We use the RTL circuit structure by extending con...
Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting...
DAC
2005
ACM
16 years 7 months ago
Freeze: engineering a fast repeater insertion solver for power minimization using the ellipsoid method
This paper presents a novel repeater insertion algorithm for the power minimization of realistic interconnect trees under given timing budgets. Our algorithm judiciously combines ...
Yuantao Peng, Xun Liu