Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...
We describe METRICS, a system to recover design productivity via new infrastructure for design process optimization. METRICS seeks to treat system design and implementation as a s...
Stephen Fenstermaker, David George, Andrew B. Kahn...
This paper presents a novel compiler for Esterel, a concurrent synchronous imperative language. It generates fast, small object code by compiling away concurrency, producing a sin...
eously demand shorter and less costly design cycles. Designing at higher levels of abstraction makes both objectives achievable, but enabling techniques like behavioral synthesis h...
The increasing complexity and software content of embedded systems has led to the common use of sophisticated system software that helps applications use the underlying hardware r...
Robert P. Dick, Ganesh Lakshminarayana, Anand Ragh...
Custom design, in which the designer controls the physical structure of the chip, can greatly improve the speed, power, and delay of an ASIC chip without affecting design time. Th...