Due to the large die sizes and tight relative clock skew margins, the impact of interconnect manufacturing variations on the clock skew in today's gigahertz microprocessors c...
Ying Liu, Sani R. Nassif, Lawrence T. Pileggi, And...
Variable ordering for BDDs has been extensively investigated. Recently, sampling based ordering techniques have been proposed to overcome problems with structure based static orde...
Yuan Lu, Jawahar Jain, Edmund M. Clarke, Masahiro ...
In this paper we describe a new hardware/software partitioning approach for embedded reconfigurable architectures consisting of a general-purpose processor (CPU), a dynamically re...
Yanbing Li, Tim Callahan, Ervan Darnell, Randolph ...
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
This paper presents a novel run-time dynamic voltage scaling scheme for low-power real-time systems. It employs software feedback control of supply voltage, which is applicable to...
The proliferation of the Internet has a ected the business model of almost all semiconductor and VLSI CAD companies that rely on intellectual property (IP) as their main source of...
Darko Kirovski, David T. Liu, Jennifer L. Wong, Mi...