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AINA
2006
IEEE

Accelerating the HMMER Sequence Analysis Suite Using Conventional Processors

14 years 5 months ago
Accelerating the HMMER Sequence Analysis Suite Using Conventional Processors
Due to the ever-increasing size of sequence databases it has become clear that faster techniques must be employed to effectively perform biological sequence analysis in a reasonable amount of time. Exploiting the inherent parallelism between sequences is a common strategy. In this paper we enhance both the fine-grained and coursegrained parallelism within the HMMER [2] sequence analysis suite. Our strategies are complementary to one another and, where necessary, can be used as drop-in replacements to the strategies already provided within HMMER. We use conventional processors (Intel Pentium IV Xeon) as well as the freely available MPICH parallel programming environment [1]. Our results show that the MPICH implementation greatly outperforms the PVM HMMER implementation, and our SSE2 implementation also lends greater computational power at no cost to the user.
John Paul Walters, Bashar Qudah, Vipin Chaudhary
Added 10 Jun 2010
Updated 10 Jun 2010
Type Conference
Year 2006
Where AINA
Authors John Paul Walters, Bashar Qudah, Vipin Chaudhary
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