As the deep sub-micron techniques evolving, embedded memories are dominating the yield, while the testing and measurement issues are more difficult due to the access limitations. To solve the testing problem, BIST circuits are developed for testing the functionality of embedded memory, but not for the AC parameters. Based on the dual-slope principle, a new memory access time measurement unit for embedded memories with separate time-to-voltage and voltageto-time architecture is proposed in this paper to achieve at-speed measurement with 50ps resolution, where the measurement error is smaller than one LSB,