Algorithms for the automatic extension of an instruction-set

Abstract—In this paper, two general algorithms for the automatic generation of instruction-set extensions are presented. The basic instruction set of a reconfigurable architecture is specialized with new applicationspecific instructions. The paper proposes two methods for the generation of convex multiple input multiple output instructions, under hardware resource constraints, based on a two-step clustering process. Initially, the application is partitioned in single-output instructions of variable size and then, selected clusters are combined in convex multiple output clusters following different policies. Our results on well-known kernels show that the extended Instructions-Set allows to execute applications more efficiently and needing fewer cycles. Our results show that a significant overall application speed-up is achieved even for large kernels (for ADPCM decoder the speed-up is up to x2.2 and for TWOFISH encoder the speedup is up to x5.5).

• Type: Conference
• Year: 2009
• Where: DATE
• Authors: Carlo Galuzzi, Dimitris Theodoropoulos, Roel Meeuws, Koen Bertels
• Keywords: Convex Multiple Output, DATE 2009, Hardware, Multiple Output, Multiple Output Instructions