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DATE
2000
IEEE

All Digital Built-in Delay and Crosstalk Measurement for On-Chip Buses

14 years 4 months ago
All Digital Built-in Delay and Crosstalk Measurement for On-Chip Buses
This paper proposes an all digital on-chip bus delay and crosstalk measurement methodology. A diagnosis procedure is derived to distinguish the delay faults in drivers, receivers, and wires. The crosstalk pro le is plotted by monitoring the changes in delay with the presence of the crosstalk. The distinguished features include all digital design and low hardware overhead. The SPICE simulation results prove the feasibility of the methodology.
Chauchin Su, Yue-Tsang Chen, Mu-Jeng Huang, Gen-Na
Added 30 Jul 2010
Updated 30 Jul 2010
Type Conference
Year 2000
Where DATE
Authors Chauchin Su, Yue-Tsang Chen, Mu-Jeng Huang, Gen-Nan Chen, Chung-Len Lee
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