DATE
2000
IEEE
14 years 4 months ago
2000
IEEE
The classical solving approach for two-level logic minimisation reduces the problem to a special case of unate covering and attacks the latter with a (possibly limited) branch-and...
DATE
2000
IEEE
14 years 4 months ago
2000
IEEE
In this paper, we give an overview of the trade-off to improve yield and optimize silicon manufacturing cost. The specific technology focus is on large embedded memories in comple...
DATE
2000
IEEE
14 years 4 months ago
2000
IEEE
DATE
2000
IEEE
14 years 4 months ago
2000
IEEE
DATE
2000
IEEE
14 years 4 months ago
2000
IEEE
Previous researchers have suggested the use of “lighthouses” to act as guides in directed state space search. The drawback of using lighthouses is that the user has to manuall...
DATE
2000
IEEE
14 years 4 months ago
2000
IEEE
In this paper, a new built-in self-test structure to test the static specifications of analog to digital converters (ADCs) is presented. A ramp signal generated by an integrator ...
DATE
2000
IEEE
14 years 4 months ago
2000
IEEE
Very low bit error rate has become an important constraint in high performance communication systems that operate at very low signal to noise ratios: due to their impressive codin...
DATE
2000
IEEE
14 years 4 months ago
2000
IEEE
This paper discusses the use of C++ for the design of digital systems. The paper distinguishes a number of different approaches towards the use of programming languages for digita...
DATE
2000
IEEE
14 years 4 months ago
2000
IEEE
This paper gives an overview of the different tools, needed for accomplishing optimal IC manufacturability and rapid technology learning during the successive phases of process ma...
DATE
2000
IEEE
14 years 4 months ago
2000
IEEE
In [1], Murata et al introduced an elegant representation of block placement called sequence pair. All block placement algorithms which are based on sequence pairs use simulated a...