Arithmetic built-in self test for high-level synthesis

In this paper, we propose an entirely new Built-In Self Test scheme for high-level synthesis of data path architectures that makes use of the arithmetic blocks in the data path to generate test vectors and compact test responses. The paper employs state coverage to evaltability in an abstract level, and subsequently, use it to guide the synthesis of testable circuits.

• Type: Conference
• Year: 1995
• Where: VTS
• Authors: Nilanjan Mukherjee, H. Kassab, Janusz Rajski, Jerzy Tyszer
• Keywords: Built-in Self Test, Data Path, Data Path Architectures, Hardware, VTS 1995