VTS
1995
IEEE
14 years 6 months ago
1995
IEEE
This paper presents a new approach for on-chip test pattern generation. The set of test patterns generated by a pseudo-random pattern generator (e.g., an LFSR) is transformed into...
VTS
1995
IEEE
14 years 6 months ago
1995
IEEE
In this paper, we propose an entirely new Built-In Self Test scheme for high-level synthesis of data path architectures that makes use of the arithmetic blocks in the data path to...
VTS
1995
IEEE
14 years 6 months ago
1995
IEEE
Optimized locally exhaustive test pattern generators based on linear sums promise a low overhead, but have an irregular structure. The paper presents a new algorithm able to compu...
VTS
1995
IEEE
14 years 6 months ago
1995
IEEE
To ensure the production of reliable circuits and fully testable unpackaged dies for MCMs burn-in, both dynamic and monitored, remains a feasible option. During this burn-in proce...
VTS
1995
IEEE
14 years 6 months ago
1995
IEEE
VTS
1995
IEEE
14 years 6 months ago
1995
IEEE
VTS
1995
IEEE
14 years 6 months ago
1995
IEEE
VTS
1995
IEEE
14 years 6 months ago
1995
IEEE
