Boolean factoring and decomposition of logic networks

This paper presents new methods for restructuring logic networks based on fast Boolean techniques. The basis for these are 1) a cut based view of a logic network, 2) exploiting the uniqueness and speed of disjoint-support decompositions, 3) a new heuristic for speeding these up, 4) extending these to general decompositions, and 5) limiting local transformations to functions with 16 or less inputs so that fast truth table manipulations can be used in all operations. The use of Boolean methods lessens the structural bias of algebraic methods, while still allowing for high speed and multiple iterations. Experimental results on area reduction of KLUT networks show an average additional reduction of 5.4% in LUT count, while preserving delay, compared to heavily optimized versions of the same networks.

• Type: Conference
• Year: 2008
• Where: ICCAD
• Authors: Alan Mishchenko, Robert K. Brayton, Satrajit Chatterjee
• Keywords: Average Additional Reduction, Boolean Methods, Fast Boolean Techniques, Hardware, ICCAD 2008