On-Chip Spectrum Analyzer for Analog Built-In Self Test

This paper presents the design of an on-chip spectrum analyzer. A novel architecture is used to mitigate the problems encountered in trying to implement architectures employed in conventional stand-alone instruments on a chip. Specifically, it makes use of a very-low IF architecture, which leads to a highly compact design, that can be used for measuring the frequency content of high frequency on-chip signals. The architecture and design considerations along with an implementation in a 0.18 µm CMOS process is described. The design takes up an area of approximately 0.384 mm2 with a simulated frequency range of 33 MHz to 3 GHz and a dynamic range of 60 dB.

• Type: Conference
• Year: 2005
• Where: VTS
• Authors: Anup P. Jose, Keith A. Jenkins, Scott K. Reynolds
• Keywords: Frequency On-chip Signals, On-chip Spectrum Analyzer, Very-low If Architecture, VTS 2005