CHIPS: Custom Hardware Instruction Processor Synthesis

This paper describes an integer-linear-programming (ILP)-based system called Custom Hardware Instruction Processor Synthesis (CHIPS) that identifies custom instructions for critical code segments, given the available data bandwidth and transfer latencies between custom logic and a baseline processor with architecturally visible state registers. Our approach enables designers to optionally constrain the number of input and output operands for custom instructions. We describe a design flow to identify promising area, performance, and code-size tradeoffs. We study the effect of input/output constraints, register-file ports, and compiler transformations such as if-conversion. Our experiments show that, in most cases, the solutions with the highest performance are identified when the input/output constraints are removed. However, input/output constraints help our algorithms identify frequently used code segments, reducing the overall area overhead. Results for 11 benchmarks covering cryptog...

• Type: Journal
• Year: 2008
• Where: TCAD
• Authors: Kubilay Atasu, Can C. Özturan, Günhan Dündar, Oskar Mencer, Wayne Luk
• Keywords: Code Segments, Custom Instructions, Instructions, TCAD 2008