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TCAD
2008
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14 years 10 days ago
CHIPS: Custom Hardware Instruction Processor Synthesis
This paper describes an integer-linear-programming (ILP)-based system called Custom Hardware Instruction Processor Synthesis (CHIPS) that identifies custom instructions for critica...
Kubilay Atasu, Can C. Özturan, Günhan D&...
EUC
2008
Springer
14 years 2 months ago
Adaptive Buffer Management for Efficient Code Dissemination in Multi-Application Wireless Sensor Networks
Future wireless sensor networks (WSNs) are projected to run multiple applications in the same network infrastructure. While such multi-application WSNs (MA-WSNs) are economically ...
Weijia Li, Yu Du, Youtao Zhang, Bruce Childers, Pi...
CGO
2004
IEEE
14 years 4 months ago
A Compiler Scheme for Reusing Intermediate Computation Results
Recent research has shown that programs often exhibit value locality. Such locality occurs when a code segment, although executed repeatedly in the program, takes only a small num...
Yonghua Ding, Zhiyuan Li
HOTOS
2003
IEEE
14 years 5 months ago
Cosy: Develop in User-Land, Run in Kernel-Mode
User applications that move a lot of data across the user-kernel boundary suffer from a serious performance penalty. We provide a framework, Compound System Calls (CoSy), to enhan...
Amit Purohit, Charles P. Wright, Joseph Spadavecch...
CASES
2004
ACM
14 years 5 months ago
A post-compiler approach to scratchpad mapping of code
ScratchPad Memories (SPMs) are commonly used in embedded systems because they are more energy-efficient than caches and enable tighter application control on the memory hierarchy...
Federico Angiolini, Francesco Menichelli, Alberto ...