ERSA
2009
13 years 9 months ago
2009
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
TCAD
2008
13 years 11 months ago
2008
This paper describes an integer-linear-programming (ILP)-based system called Custom Hardware Instruction Processor Synthesis (CHIPS) that identifies custom instructions for critica...
FPGA
2008
ACM
14 years 1 months ago
2008
ACM
Application-Specific Instruction-set Processors (ASIP) can improve execution speed by using custom instructions. Several ASIP design automation flows have been proposed recently. ...
ASAP
2007
IEEE
14 years 1 months ago
2007
IEEE
FPGA (Field Programmable Gate Array) based reconfigurable processor has been shown to meet the increasingly challenging performance targets and shorter time-to-market pressures. I...
EUC
2006
Springer
14 years 3 months ago
2006
Springer
Extracting appropriate custom instructions is an important phase for implementing an application on an extensible processor with a reconfigurable functional unit (RFU). Custom inst...
CASES
2004
ACM
14 years 3 months ago
2004
ACM
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. However, it is computationally expensive to automaticall...
FPL
2007
Springer
14 years 3 months ago
2007
Springer
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. These custom instructions are selected through an analys...
ISCA
2005
IEEE
14 years 5 months ago
2005
IEEE
Instruction set customization is an effective way to improve processor performance. Critical portions of application dataflow graphs are collapsed for accelerated execution on s...
CODES
2005
IEEE
14 years 5 months ago
2005
IEEE
Instruction-set extensible processors allow an existing processor core to be extended with application-specific custom instructions. In this paper, we explore a novel application...
DATE
2006
IEEE
14 years 5 months ago
2006
IEEE
We propose a novel methodology to generate Application Specific Instruction Processors (ASIPs) including custom instructions. Our implementation balances performance and area req...