Chisel: constructing hardware in a Scala embedded language

In this paper we introduce Chisel, a new hardware construction language that supports advanced hardware design using highly parameterized generators and layered domain-specific hardware languages. By embedding Chisel in the Scala programming language, we raise the level of hardware design abstraction by providing concepts including object orientation, functional programming, parameterized types, and type inference. Chisel can generate a high-speed C++-based cycleaccurate software simulator, or low-level Verilog designed to map to either FPGAs or to a standard ASIC flow for synthesis. This paper presents Chisel, its embedding in Scala, hardware examples, and results for C++ simulation, Verilog emulation and ASIC synthesis. Categories and Subject Descriptors B.6.3 [Logic Design]: [Design Aids – automatic synthesis, hardware description languages] General Terms Design, Languages, Performance Keywords CAD

• Type: Journal
• Year: 2012
• Where: DAC
• Authors: Jonathan Bachrach, Huy Vo, Brian Richards, Yunsup Lee, Andrew Waterman, Rimas Avizienis, John Wawrzynek, Krste Asanovic
• Keywords: Asic Synthesis, Computer Architecture, DAC 2012, Design Abstraction, Hardware Description Languages