Comparison of Opamp-Based and Comparator-Based Delta-Sigma Modulation

Comparator-based switched capacitor (CBSC) circuits present an alternative approach to designing sampled data systems based on the principle of detecting a virtual ground condition with a comparator rather than actively enforcing it with a high-gain operational amplifier (opamp) in feedback. This work demonstrates a 2nd -order ∆Σ converter designed using the CBSC technique. The same modulator topology was also implemented using two conventional design methods for a two-stage Miller-compensated amplifier and a single-stage folded cascode amplifier, such that all three blocks can be used as ‘drop-in replacements’ in the top-level circuit. The designs are done in a 0.13 µm UMC technology. The SNDR performance and power consumption of all three approaches were simulated with a sampling frequency of 5.12 MHz and an oversampling ratio of 64. It can be concluded that the CBSC method provides a great simplification of design effort and significant power savings compared to the tr...

• Type: Conference
• Year: 2008
• Where: DATE
• Authors: Massoud Momeni, Petru Bogdan Bacinschi, Manfred Glesner
• Keywords: CBSC Method, CBSC Technique, Comparator-based Switched Capacitor, DATE 2008, Hardware