A cosynthesis algorithm for application specific processors with heterogeneous datapaths

Abstract- This paper proposes a hardwadsoftware cosynthesis algorithm for processors with heterogeneous registers. Given a CDFG correspondingto an application program and a timing constraint,the algorithmgeneratesa processor configuration minimizing area of the processor and an assembly code on the processor. First, the algorithm configures a datapath which can execute several DFG nodes with data dependency at one cycle. The datapath can execute the application program at the least number of cycles. The branch and bound algorithm is applied and all the number of functionalunits and memory banks are tried. For assumed number of functional units and memory banks, an appropriate number of heterogeneousregistersand connections to functional units and registers are explored. The experimental resultsshow effectivenessand efficiency of the algorithm.

• Type: Conference
• Year: 2004
• Where: ASPDAC
• Authors: Yuichiro Miyaoka, Nozomu Togawa, Masao Yanagisawa, Tatsuo Ohtsuki
• Keywords: Algorithm, Application Program, ASPDAC 2004, Hardwadsoftware Cosynthesis Algorithm