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ISQED
2007
IEEE

Cross Layer Error Exploitation for Aggressive Voltage Scaling

14 years 5 months ago
Cross Layer Error Exploitation for Aggressive Voltage Scaling
This paper shows that by co-designing circuits and systems, considerable power savings are possible if the inherent data redundancy of candidate systems such as wireless is used to compensate for hardware failures. A comprehensive study of 6T SRAM failure modes is presented. The generated statistics are used to quantify a power savings of up to 17.5% for a se study of a 32 nm CMOS 3GPP WCDMA modem.ca
Amin Khajeh Djahromi, Ahmed M. Eltawil, Fadi J. Ku
Added 06 Jun 2010
Updated 06 Jun 2010
Type Conference
Year 2007
Where ISQED
Authors Amin Khajeh Djahromi, Ahmed M. Eltawil, Fadi J. Kurdahi, Rouwaida Kanj
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