A design kit for a fully working shared memory multiprocessor on FPGA

This paper presents a framework to design a shared memory multiprocessor on a programmable platform. We propose a complete flow, composed by a programming model and a template architecture. Our framework permits to write a parallel application by using a shared memory model. It deals with the consistency of shared data, with no need of hardware coherence protocol, but uses a software model to properly synchronize the local copies with the shared memory image. This idea can be applied both to a scratchpadbased architecture or a cache-based one. The architecture is synthesizable with standard IPs, such as the softcores and interconnect elements, which may be found in any commercial FPGA toolset. Categories and Subject Descriptors

• Type: Conference
• Year: 2007
• Where: GLVLSI
• Authors: Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto
• Keywords: GLVLSI 2007, Shared Memory, Shared Memory Model, Shared Memory Multiprocessor, VLSI