This paper proposes two very fast graph theoretic heuristics for the low power binding problem given fixed number of resources and multiple architectures for the resources. First the generalized low power binding problem is formulated as an Integer Linear Programming(ILP) problem which happens to be an NP-complete task to solve. Then two polynomial-time heuristics are proposed that provide a speedup of up to 13.7 with an extremely low penalty for power when compared to the optimal ILP solution for our selected benchmarks . Categories and Subject Descriptors B.5.2 [RTL-Implementation]: Design Aids—Automatic synthesis, optimization General Terms Algorithms, Performance, Design, Theory Keywords Low-power Binding, Graph Theory, High Level Synthesis