Efficient incremental analysis of on-chip power grid via sparse approximation

In this paper, a new sparse approximation technique is proposed for incremental power grid analysis. Our proposed method is motivated by the observation that when a power grid network is locally updated during circuit design, its response changes locally and, hence, the incremental “change” of the power grid voltage is almost zero at many internal nodes, resulting in a unique sparse pattern. An efficient Orthogonal Matching Pursuit (OMP) algorithm is adopted to solve the proposed sparse approximation problem. In addition, several numerical techniques are proposed to improve the numerical stability of the proposed solver, while simultaneously maintaining its high efficiency. Several industrial circuit examples demonstrate that when applied to incremental power grid analysis, our proposed approach achieves up to 130u runtime speed-up over the traditional Algebraic Multi-Grid (AMG) method, without surrendering any accuracy. Categories and Subject Descriptors B.7.2 [Integrated Circuit...

• Type: Journal
• Year: 2011
• Where: DAC
• Authors: Pei Sun, Xin Li, Ming Yuan Ting
• Keywords: Approximation Technique, Computer Architecture, DAC 2011, Integrated Circuits Design, Sparse Approximation