Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

18

DT
2002

favoriteEmaildiscussreport

55views more DT 2002»

Embedded Timing Analysis: A SoC Infrastructure

13 years 10 months ago

Embedded Timing Analysis: A SoC Infrastructure

Download thesis.lib.ncu.edu.tw

Sassan Tabatabaei, André Ivanov

Real-time Traffic

DT 2002 |

claim paper

Related Content

» An Interactive Model ReCoder for Efficient SoC Specification

» Models for Embedded Application Mapping onto NoCs Timing Analysis

» Design of a Highly Dependable Beamforming Chip

» Handling mixedcriticality in SoCbased realtime embedded systems

» Formal Analysis of PublishSubscribe Systems by Probabilistic Timed Automata

» SoCBUS Switched Network on Chip for Hard Real Time Embedded Systems

» From intranets to wrestling information infrastructures

» Experimental Studies and Modeling of an Information Embedded Power System

» Extending systemsonchip to the third dimension performance cost and technological tradeoff...

Post Info
More Details (n/a)

Added	18 Dec 2010
Updated	18 Dec 2010
Type	Journal
Year	2002
Where	DT
Authors	Sassan Tabatabaei, André Ivanov

Comments (0)