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    A FPGA-based Parallel Architecture for Scalable High-Speed Packet Classification

    14 years 4 months ago
    A FPGA-based Parallel Architecture for Scalable High-Speed Packet Classification
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    Weirong Jiang, Viktor K. Prasanna
    claim paper
    Added 09 Jul 2010
    Updated 09 Jul 2010
    Type Conference
    Year 2009
    Where ASAP
    Authors Weirong Jiang, Viktor K. Prasanna
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