Sciweavers

    ASAP
    2009
    IEEE
    95views Hardware» more  ASAP 2009»

    A FPGA-based Parallel Architecture for Scalable High-Speed Packet Classification

    14 years 5 months ago
    A FPGA-based Parallel Architecture for Scalable High-Speed Packet Classification
    Download  halcyon.usc.edu
    Weirong Jiang, Viktor K. Prasanna
    claim paper
    Added 09 Jul 2010
    Updated 09 Jul 2010
    Type Conference
    Year 2009
    Where ASAP
    Authors Weirong Jiang, Viktor K. Prasanna
    Comments (0)
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.