Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems

Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often has several limitations, such as excessive simulation time, absence of OS activities and proneness to simulation inaccuracy. To address these issues, we have taken an efficient software approach to supporting both static and dynamic cache partitioning in OS through memory address mapping. We have comprehensively evaluated several representative cache partitioning schemes with different optimization objectives, including performance, fairness, and quality of service (QoS). Our software approach makes it possible to run the SPEC CPU2006 benchmark suite to completion. Besides confirming important conclusions from previous work, we are able to gain several insights from wholeprogram executions, which are infeasible from simulation. For example, giving up some cache space in one program to help another one may imp...

• Type: Conference
• Year: 2008
• Where: HPCA
• Authors: Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, Xiaodong Zhang, P. Sadayappan
• Keywords: Cache Partitioning Schemes, Computer Architecture, Dynamic Cache Partitioning, HPCA 2008, Multicore Cache Partitioning